Contributed by mbalmer on from the we-dont-need-ndas dept.
Intel's Enhanced Speed Stepping Technology, or EST for short, allows a CPU to adjust it's running speed - and thus power consumption - at runtime; this happens quickly and invisible to the user, multiple times per second, if needed. This technology is built into the Pentium M CPUs which are often found in Laptops and more and more in embedded devices. Functionally equivalent technologies are also built into some other vendor's CPU's, e.g. the VIA C7-M line.
The EST technology, while beneficial, also plagued us and other free operating systems for quite some time. This is because for early Pentium M models, Intel freely published the so called operating points of the CPU, voltage/frequency pairs that set the CPU to a certain speed-step. Obviously you need to know the exact CPU model you are running on and you need to have a table of the valid operating points to step up/down the CPU speed.
Now guess what: For newer CPUs Intel does no longer publish the operating points! And this is where Dimitry's code comes into play:
Since most CPUs that support EST report at least their highest and lowest operating points in a more or less undocumented register, we can use those to have EST work, at least in a rudimentary way, on CPUs for which we have no complete power state information.
So if your CPU advertises SpeedStep, but it didn't work before, whith this change in our EST code, chances are that you laptop might now work with a recent OpenBSD snapshot.
And here is the list of the changes:
- If an unknown EST CPU is encountered, use the known highest and lowest (and if different, the current) power state to generate a fake power state table on the fly (thanks to canacar@ for the idea.)
- Calculate the system bus clock speed before calling est_init(); it is needed to display proper MHz values from MSR values.
- Also use the bus clock to identify EST CPUs, which is needed to differentiate e.g. Pentium M 715 and 760, which unfortunately have exactly the same MSR values.
- Store power states directly as MSR values.
Dimitry Andric lives in Utrecht, the Netherlands. He's been using OpenBSD since 2.6 or thereabouts, and he got committ access to OpenBSD a few months ago, when he worked on improving support for several AGP chipsets, such as the Intel 915 and 945 integrated graphics adapters. This work allowed X.org to run with hardware acceleration on these chips.
(Comments are closed)
By Anonymous Coward (84.188.240.50) on
VIA does NOT use SpeedStep, they call it "SpeedAhead"/"CollStream" and I bet it`s a modified version (and not directly SpeedStep) like the LongRun(2) Technology of the Crusoe-CPUs.
So maybe asking VIA for those Docs (for VIA CPUs) could help improving that stuff on VIA-based CPUs.
Comments
By Brad (216.138.195.228) on
apmd just sets a syctl, it doesn't know about supported or not. with the new code almost all CPUs should be supported anyway. last of all, I don't feel this is something that should be added to apmd, even if it did have a way of knowing if a CPU was not supported.
> VIA does NOT use SpeedStep, they call it "SpeedAhead"/"CollStream" and I bet it`s a modified version (and not directly SpeedStep) like the LongRun(2) Technology of the Crusoe-CPUs.
The article does not say VIA uses SpeedStep. It says functionally equivalent.
> So maybe asking VIA for those Docs (for VIA CPUs) could help improving that stuff on VIA-based CPUs.
The docs are already available and the C7-M CPU is already supported.
Comments
By Anonymous Coward (193.63.217.208) on
Does the new code interact with the sysctl that apmd sets? If so, how?
By Anonymous Coward (82.101.240.248) on
>
> The docs are already available and the C7-M CPU is already supported.
Unfortunately some newer CPU are not supported (for example the Eden 1200Mhz (6a0) In 4.3 there is a table for the 90nm Eden 1000mhz
By Anonymous Coward (64.233.199.212) on
Comments
By Otto Moerbeek (213.84.84.111) otto@drijf.net on http://www.drijf.net
You are not saying if you run amd64 or i386.
To be more helpful, send a dmesg and a description of the symptoms to dim@ and misc@, that way developers at least get a chanche to diagnose the problem.
By Anonymous Coward (84.188.235.179) on
AMD has no SpeedStep!
AMD uses Cool`n`Quiet and as far as I know most CPUs just support 2 "Speeds". Max. and Min (wich is mostly 800Mhz).
As long as you`ve a AMD64 and no mobile CPU you shouldn`t exspect another result. :)
But a dmesg would help for sure. =)
By Gordon Willem Klok (24.57.96.182) gwk@openbsd.org on
As someone else already posted AMD CPUs donot use SpeedStep, they use Powernow! or Cool'N`Quiet both marketing names for the same technology. Support for this has been added since 3.9 to amd64, IIRC support for powernow on 8th generation processors (opteron, athlon64, turrion) running i386 was included in 3.9. Otto is right if you want it fixed you might try sending me a dmesg. Its important to note that not all machines that are capable of using powernow (which is actually pretty much any machine with a amd64 processor less the early opterons) can do so currently under OpenBSD, we only use the legacy way of determing availabe states. This method wont work for most muliprocessor machines and a lot of vendors only supply this information through ACPI.
gwk
By Nuno Morgadinho (89.180.9.192) nuno@morgadinho.org on http://morgadinho.org
By Anonymous Coward (213.118.134.198) on
http://www.woolworths.co.uk/ww_p2/product/index.jhtml?pid=50616022
Comments
By Anonymous Coward (70.66.1.113) on
> http://www.woolworths.co.uk/ww_p2/product/index.jhtml?pid=50616022
This was already answered on one of the posts above